1. Field of the Invention
The present invention relates to a duty cycle alteration circuit, and more particularly, to a duty cycle alteration circuit for a monitor which can simply alter a duty cycle of a pulse by using a Schmitt circuit.
2. Discussion of Related Art
Generally, if a high voltage change is generated on a monitor in accordance with variation of horizontal and vertical frequencies for synchronizing a video signal outputted from a computer, a part or the entire screen of the monitor is distorted. To solve the partial or entire screen distortion, it should be expected that a novel monitor has a high voltage change which is less sensitive to the variation of frequency.
A representative duty cycle alteration circuit for avoiding the partial or entire screen distortion is classified into a horizontal duty cycle alteration circuit which senses a change of a secondary side load of a transformer in a monitor power circuit and adjusts a duty cycle according to the sensed change of the load and a duty cycle alteration circuit which has a large current variation according to a load change and senses the large current variation from a horizontal output transistor.
In the horizontal duty cycle alteration circuit, a horizontal phase size is large, if a beam current generated by a secondary side winding of a flyback transformer(FBT) is large, and contrarily, the horizontal phase size is constant, if the beam current is small.
Further, in the horizontal duty cycle alteration circuit, if the voltage supplied to the FBT is varied, a high voltage variation ratio of the FBT is great and simultaneously the voltage supplied to the screen is varied. At the time, if the voltage supplied to the screen and the voltage induced from the FBT are lowered, the brightness of the screen is darkened. Particularly, if the voltage supplied to a contrast resistor is varied, the variation of the brightness of a back raster is extremely great.
In more detail, as the variation of the brightness on the screen of a low voltage of video signal increases, degradation of a quality of image occurs. Moreover, since the horizontal duty cycle alteration circuit is designed to sense the secondary side current of the FBT generated due to the variation of load and to adjust the duty cycle by feeding back the sensed signal, there occurs a problem in that a response speed to the sensed signal fed back is slow.
In an earlier duty cycle control circuit, data is processed and outputted from a computer as a video signal through a video card which outputs the video signal as a horizontal synchronous signal and a vertical synchronous signal to display it on a monitor screen.
The horizontal synchronous signal and the vertical synchronous signal outputted from the video card are inputted to a microcomputer within a monitor. The microcomputer executes a previously stored microcomputer control program and then outputs the horizontal and vertical synchronous signals and a horizontal size signal. The horizontal synchronous signal and the vertical synchronous signals outputted from the microcomputer are supplied to a horizontal and vertical oscillation signal processor in which a reference oscillation signal and the horizontal and vertical oscillation signals are supplied to thereby bandwidth compensate and correct linearity.
A horizontal drive circuit to which the horizontal oscillation signal is supplied from the horizontal and vertical oscillation signal processor supplies a sufficient current to drive a horizontal output circuit. The horizontal output circuit causes a sufficient deflection current to flow a horizontal deflection yoke. As a result, the application of the sufficient deflection current enables the horizontal deflection yoke to synchronize the video signal displayed on the monitor.
On the other hand, a horizontal size controller to which the horizontal size signal outputted from the microcomputer is supplied, controls the horizontal size signal to output a horizontal size adjusting signal which is supplied to a horizontal size drive circuit in which the supplied horizontal size adjusting signal is fully amplified and outputted.
The horizontal size adjusting signal outputted from the horizontal size drive circuit is supplied to a horizontal regulation controller. A regulation sensor senses the variation of a sawtooth current outputted from the horizontal output circuit and the regulation sensor supplies the sensed variation signal of the sawtooth current to the horizontal regulation controller. Then, the horizontal regulation controller inputs the horizontal size adjusting signal outputted from the horizontal size drive circuit and outputs a control signal according to the variation signal of the sawtooth current.
The control signal outputted from the horizontal regulation controller is supplied to a horizontal regulation output circuit which supplies a pulse according to the applied control signal to the horizontal output circuit to thereby stabilize the sawtooth current outputted from the horizontal output circuit. As a result, the horizontal phase size displayed on the monitor screen is constantly maintained.
Since the earlier duty cycle alteration circuit however utilizes a complicated pulse width modulation integrated circuit and peripheral circuits, there is a problem in that the circuit construction is complicated.
The following patents each disclose features in common with the present invention but do not teach or suggest the specifically recited duty cycle alteration circuit of the present invention: U.S. Pat. No. Re. 35,428 to Wilhelm, entitled Electronic Rheostat Method And Apparatus, U.S. Pat. No. 5,568,044 to Bittner, entitled Voltage Regulator That Operates In Either PWM Or PFM Mode, U.S. Pat. No. 5,528,111 to Konopka et al., entitled Ballast Circuit For Powering Gas Discharge Lamp, U.S. Pat. No. 5,179,693 to Kitamura et al., entitled System For Controlling Operation Of Processor By Adjusting Duty Cycle Of Performance Control Pulse Based Upon Target Performance Value, U.S. Pat. No. 5,418,707 to Shimer et al., entitled High Voltage DC-DC Converter With Dynamic Voltage Regulation And Load-Generated Arcs, U.S. Pat. No. 5,144,207 to Brunson, entitled Circuit And Method For Igniting And Operating An Arc Lamp, U.S. Pat. No. 4,823,250 to Kolecki et al., entitled Electronic Control For Light Weight, Portable X-Ray System, U.S. Pat. No. 5,438,292 to Tadokoro, entitled Schmitt Trigger Circuit With CMOS Inverters And Filtering Means, U.S. Pat. No. 5,008,563 to Kenney et al., entitled Adjustable Clock Generator Circuit, and U.S. Pat. No. 4,726,658 to Nishimura et al., entitled Effective Value Voltage Stabilizer For A Display Apparatus.